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tb6575fng 2006-3-6 1 toshiba cmos integrated circuit silicon monolithic tb6575fng pwm sensorless controller for 3-phase full-wave bldc motors the tb6575fng provides sensorless commutation and pwm current control for 3-phase full-wave bldc motors. it controls rotation speed by changing a pwm duty cycle by analog voltage. features ? 3-phase full-wave sensorless drive ? pwm chopper drive ? pwm duty cycle control by analog input ? 20-ma current sink capability on pwm output pins ? overcurrent protection ? forward/reverse rotation ? lead angle control (7.5 and 15) ? overlap commutation ? rotation speed sensing signal ? dc excitation mode to improve startup characteristic ? dc excitation time and forced commutation time for startup operation can be changed. ? forced commutation frequency can be selected. (f xt /(6 2 16 ), f xt /(6 2 17 ), f xt /(6 2 18 ) ) ? output polarity switching (p-channel + n-channel, n-channel + n-channel) weight: 0.14 g (typ.) the following conditions apply to solderability: *solderability 1. use of sn-37pb solder bath *solder bath temperature = 230 o c *dipping time = 5 seconds *number of times = once *use of r-type flux 2. use of sn-3.0ag-0.5cu solder bath *solder bath temperature = 245 o c *dipping time = 5 seconds *number of times = once *use of r-type flux
tb6575fng 2006-3-6 2 block diagram pin assignment 6-bit ad converter v sp sc pwm control timing control pwm generator sel_lap cw_ccw la f max f st dc excitation control circuit start ip clock generation x tout x tin overcurrent protection position recognition wave oc out_un out_wp out_wn out_vn out_vp out_up fg_out os v dd gnd 9 8 24 4 12 20 6 2 5 21 3 7 13 15 17 14 16 18 22 23 10 11 1 forced commutation frequency setting maximum commutation frequency setting lead angle setting duty 19 startup time setting la wave oc v sp f max cw_ccw f st start ip x tout x tin gnd 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 os sc fg_out v dd duty out_wn out_wp out_vn out_vp out_un out_up sel_lap
tb6575fng 2006-3-6 3 pin description pin no. symbol i/o description 1 gnd ? ground pin 2 sc i connection pin for a capacitor to set a start up commutation time and duty cycle ramp-up time 3 os i select the polarity of transistors. high or open : high-side transistor = p-channel (active low) low-side transistor = n-channel (active low) low : high-side transistor = n-channel (active low) low-side transistor = n-channel (active low) the pin has a pull-up resistor. 4 f max i set an upper limit of the maximum commutation frequency. f max =high or open , maximum commutation frequency f mx = f xt / (6 2 11 ) f max =low , maximum commutation frequency f mx = f xt /(6 2 12 ) f max =high or open , maximum commutation frequency f mx = f xt / (6 2 8 ) f max =low , maximum commutation frequency f mx = f xt /(6 2 9 ) the pin has a pull-up resistor. 5 v sp i duty cycle control input 0 v sp v ad (l): output off v ad (l) v sp v ad (h): set the pwm duty cycle according to the analog input. v ad (h) v sp v dd : duty cycle = 100% (31/32) the pin has a pull-down resistor. 6 cw_ccw i rotation direction input high : reverse rotation (u w v) low or open : forward rotation (u v w) the pin has a pull-down resistor. 7 fg_out o rotation speed sensing output the pin is low at startup or upon a detection of a fault. this pin drives three pulses per rotation (3 ppr) based on the back-emf (electromo tive force) sensing. (in the case of 4 pole motor, 6 pulse output per rotation.) 8 start o 9 ip i dc excitation time setting pins when v sp 1 v (typ.), the start pin goes low to start dc excitation. after the ip pin reaches v dd /2, the tb6575fng moves from dc excitation to forced commutation mode. 10 x t ? 11 x tin ? connection pins for a crystal oscillator these pins have a feedback resistor. 12 la i lead angle control input la = low or open : lead angle of 7.5 la = high : lead angle of 15 the pin has a pull-down resistor. 13 out_up o pwm output signal for the high-side (posit ive-side) transistor driving motor phase u the pwm polarity can be specified by pin 3. 14 out_un o pwm output signal for the low-side (negativ e-side) transistor driving motor phase u this signal is active high. 15 out_vp o pwm output signal for the high-side (posit ive-side) transistor driving motor phase v the pwm polarity can be specified by pin 3. 16 out_vn o pwm output signal for the low-side (negativ e-side) transistor driving motor phase v this signal is active high. 17 out_wp o pwm output signal for the high-side (posit ive-side) transistor driving motor phase w the pwm polarity can be specified by pin 3. 18 out_wn o pwm output signal for the low-side (negativ e-side) transistor driving motor phase w this signal is active high. 19 duty o pwm output monitor pin this pin drives pwm output whose duty cycle corresponds to the v sp input. it also reflects the information at the oc pin. 20 sel_lap i overlap commutation select pin low: overlap commutation high: 120 commutation the pin has a pull-up resistor.
tb6575fng 2006-3-6 4 pin no. symbol i/o description 21 v dd ? 5-v power supply pin 22 oc i overcurrent detection input the all pwm output signals are stopped when oc 0.5 (v). the pin has a pull-up resistor. 23 wave i position sensing input 3-phase voltage is applied to this pin. the pin has a pull-up resistor. 24 f st i forced commutation frequency select pin high or open : forced commutation frequency f st = f xt /(6 2 16 ) middle : forced commutation frequency f st = f xt /(6 2 17 ) low : forced commutation frequency f st = f xt /(6 2 18 ) the pin has a pull-up resistor. functional description 1. sensorless drive on receiving an analog voltage command input, the roto r is aligned to a known position in dc excitation mode, and then the rotation is star ted in forced commutation mode by applying a pwm signal to the motor. as the rotor moves, back-emf is acquired. when a signal indicating the polari ty of each of the phase voltages including back-emf is applied to the position signal input pin, automa tic switching occurs from the forced commutation pwm signal to the natural commutation pwm signal (which is generate d based on the back-emf sensing) to drive a bldc motor in sensorless mode. 2. startup operation when the motor is stationary, there is no back-emf and the motor position is unknown. for this reason, the rotor is aligned to a known position in dc excita tion mode and then the rota tion is started in forced commutation mode. an external capacitor sets the ti mes that the tb6575fng stays in dc excitation and forced commutation modes. those times vary depending on the motor type and mo tor loading. thus, they must be adjusted experimentally. 5 2 9 8 r 1 c 2 c 1 v sp tb6575fng 2 v dd (a) (b) gnd t up v sp v sp (5 pin) start_sp (8 pin) ip (9 pin) sc (2 pin) v dd v sp 1.0 (v) v ad (l) (a): dc excitation period : t fix (typ.) = 0.69 c1 r1 (s) (b): forced commutation period t up (typ.) = c1 v sp /3.8 a (s)
tb6575fng 2006-3-6 5 the rotor is aligned to a known position in dc excitation mode for period (a), during which the ip pin voltage decreases to half v dd level. the time constant for the period is determined by c and r 1 . after that, switching occurs to forced commutation mode represented by (b). th e duty cycles for dc excita tion and forced commutation modes are determined according to the sc pin voltage. 8ifouifovncfspguvsopgbnpupsjtujnfnpsfuibo gpsdfedpnnvubujpogsfrvfodz u ifnpupstxjudiftuptfotpsmftt npef the duty cycle for sensorless mode is determined by the v sp value. 3. forced commutation frequency the forced commutation frequency for st artup operation is set as follows. the optimal frequency varies depending on the motor ty pe and motor loading. thus, it must be adjusted experimentally. f st = high or open : forced commutation frequency f st = f xt /(6 2 16 ) f st = middle : forced commutation frequency f st = f xt /(6 2 17 ) f st = low : forced commutation frequency f st = f xt /(6 2 18 ) * f xt : crystal oscillator frequency 4. pwm frequency the pwm frequency is determined by an external oscillator. pwm frequency (f pwm ) = f xt /256 * f xt : crystal oscillator frequency the pwm frequency must be sufficien tly high, compared with the electrical frequency of the motor and within the switching perfor mance of the transistors. 5. speed control v sp pin an analog voltage applied to the v sp pin is converted by the 6-bit ad converter to control the duty cycle of the pwm. 0 v duty v ad (l) duty cycle = 0% v ad (l) v duty v ad (h) figure at the right (1/64 to 63/64) v ad (h) v duty v dd duty cycle = 100% (63/64) pwm signal driving high-side transistors pwm signal driving low-side transistors motor pin voltage os = high or open 0% v ad (l) 1 v (typ.) 100% duty cycle v sp v ad (h) 4 v (typ.) t fix
tb6575fng 2006-3-6 6 6. fault protection when a signal indicating the following faults is applied to the wave pin, the output transistors are disabled. after about one second, the motor is restarted. this operation is repeated as long as a fault is detected. ? the maximum commutation frequency is exceeded. ? the rotation speed falls below th e forced commutation frequency. 7. motor position detection error a position detection is synchronized with the pwm si gnal generated in the ic. thus, a position detection error relative to the pwm signal frequency may occur. keep this in mind especially when the tb6575fng is used for a high-speed motor. a detection is performed on the falling edge of the pwm signal. an error is recognized when the pin voltage exceeds the reference voltage. detection error time < 1/f p f p : pwm frequency = f xt /256 f xt : crystal oscillator frequency when the sc pin capacitor = 0.47 f and v sp = 4 v (a): t off = i v c sp sc ) 1 ( ? = a 5 . 1 ) 1 4 ( f 47 . 0 ? = 940 ms (typ.) v sp (pin5) output pin start (pin8) 1 v ip (pin9) sc (pin9) fault detected on off on (a) v sp = 1 v or higher v sp internal pwm signal pin voltage reference voltage pin voltage position sensing input ideal detection timing a ctual detection timing output on
tb6575fng 2006-3-6 7 8. lead angle control the motor runs with a lead angle of 0 in forced commu tation mode at startup. after switching to natural commutation, the lead angle automatically ch anges to the value set by the la pin. 9. overlap commutation when sel_lap = high, the tb6575fng is configured to allow for 120 commutation. when sel_lap = low, it is configured to allow for overlap commutation . in overlap commutation, th ere is an overlap period during which both the outgoing tran sistor and incoming transistor are conducting (as shown in the shaded areas). this period varies ac cording to the lead angle. (3) lead angle of 15 out_wn out_vn out_wp back-emf pwm signal (1) lead angle of 0 out_up out_un out_vp out_vn out_wp out_wn (2) lead angle of 7.5 out_up out_un out_vp out_up out_un out_vp out_vn out_wp out_wn uv w 30 22.5 15 * os = high (2) lead angle of 15 out_wn out_vn out_wp back-emf pwm signal (1) lead angle of 7.5 out_up out_un out_vp out_up out_un out_vp out_vn out_wp out_wn uv w * os = high
tb6575fng 2006-3-6 8 absolute maximum ratings (ta = 25c) characteristics symbol rating unit power supply voltage v dd 5.5 v input voltage v in ? 0.3~v dd + 0.3 v turn-on signal output current i out 20 ma power dissipation p d 780 (note) mw operating temperature t opr ? 30~105 c storage temperature t stg ? 55~150 c note: without a pcb, stand-alone operation recommended operating conditions (ta = ? 30 to 105c) characteristics symbol test condition min typ. max unit power supply voltage v dd ? 4.5 5.0 5.5 v input voltage v in ? ? 0.3 ? v dd + 0.3 v oscillation frequency f xt ? 2.0 4.0 8.0 mhz
tb6575fng 2006-3-6 9 electrical characteristics (ta = 25c, v dd = 5 v) characteristics symbol test circuit test condition min typ. max unit static power supply current i dd ? v sp = 0 v, x tin = h ? 0.7 ma dynamic power supply current i dd (opr) ? v sp = 2.5 v, x tin = 4 mhz, output open ? 2 6 ma i in-1 (h) ? v in = 5 v, oc, wave, sel_lap f max , f st , os ? 0 1 i in-1 (l) ? v in = 0 v, oc, wave, sel_lap, f max , f st , os ? 75 ? 50 ? i in-2 (h) ? v in = 5 v, cw_ccw, la, v sp ? 50 75 input current i in-2 (l) ? v in = 0 v, cw_ccw, la, v sp ? 1 0 ? a v in-1 (h) ? oc, sel_lap, cw_ccw wave, la, f max , os 3.5 ? 5 v in-1 (l) ? oc, sel_lap, cw_ccw wave, la, f max , os gnd ? 1.5 v in-2 (h) ? f st 4 ? 5 v in-2 (m) ? f st 2 ? 3 input voltage v in-2 (l) ? f st gnd ? 1 v input hysteresis voltage v h ? wave, % ? 0.45 ? v v o-1 (h) ? i oh = ? 2 ma out_up, out_vp, out_wp 4.5 ? v dd v o-1 (l) ? i ol = 20 ma out_up, out_vp, out_wp gnd ? 0.5 v o-2 (h) ? i oh = ? 20 ma out_un, out_vn, out_wn 4.5 ? v dd v o-2 (l) ? i ol = 2 ma out_un, out_vn, out_wn gnd ? 0.5 v o-3 (h) ? i oh = ? 0.5 ma fg_out 4.5 ? v dd output voltage v o-3 (l) ? i ol = 0.5 ma fg_ out gnd ? 0.5 v i l (h) ? v dd = 5.5 v, v out = 0 v out_up, out_vp, out_wp, out_un, out_vn, out_wn, fg_out ? 0 10 output leak current i l (l) ? v dd = 5.5 v, v out = 5.5 v out_up, out_vp, out_wp out_un, out_vn, out_wn, fg_out ? 0 10 a v ad (l) 0.8 1.0 1.2 pwm input voltage v ad (h) ? v sp 3.8 4.0 4.2 v c sc charge current i sc ? sc 2.6 3.8 5.0 a fault retry time t off ? v sp = 4 v, sc pin = 0.47 f ? 940 ? ms overcurrent detection voltage v oc ? oc 0.46 0.5 0.54 v
tb6575fng 2006-3-6 10 input equivalent circuit 1. v sp pin 2. sel_lap, f max , f st , wave and os pins hysteresis width wave : 450 mv (typ.) 3. la and cw_ccw pins 4. out_up, out_un, out_vp, out_vn, out_wp, out_wn and fg_out pins 5. x tin and x tout pins 6. oc pin 150 ? v dd x tout pin x tin pin " ? 150 ? v dd v dd 100 k ? 1 k ? input pin startup time setting block v dd 100 k ? 1 k ? input pin internal logic v dd v dd 100 k ? 1 k ? input pin internal logic v dd internal logic output pin v dd 5 pf 200 k ? oc pin internal logic 0.5 v v dd 100 k ?
tb6575fng 2006-3-6 11 application circuit example note 1: utmost care is necessary in the design of the output, v cc , v m , and gnd lines since the ic may be destroyed by short- circuiting between outputs, air contamination faults, or faults due to improper grounding, or by short-circuiting between contiguous pins. note 2: the above application circuit including component values is reference only. because the values may vary depending on th e motor type, the optimal values must be determined experimentally. * 1: connect a resistor, if necessary, to prevent malfunction due to noise. 2 v dd v sp sc sel_lap cw_ccw la f max f st start ip 20 startup time setting 6-bit ad converter pwm control timing setting pwm generator 1-phase excitation control circuit clock generation x tout x tin overcurrent protection position recognition wave oc out_un out_wp out_wn out_vn out_vp out_up fg_out os v dd gnd 9 8 24 4 12 6 2 5 21 24 7 13 15 17 14 16 18 22 23 10 11 1 startup commutation frequency setting maximum commutation frequency setting lead angle setting speed command (analog voltage) v dd mcu 5 v 4-mhz crystal oscillato r m ta75393p 1 k ? v m 100 k ? 3 1 ? 22 pf 10 k ? 100 k ? 100 k ? 19 duty ( * 1)
tb6575fng 2006-3-6 12 package dimensions weight: 0.14 g (typ.)
tb6575fng 2006-3-6 13 notes on contents 1. block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required, especially at the mass production design stage. toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics [1] the absolute maximum ratings of a semiconductor de vice are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. [2] do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. in addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.
tb6575fng 2006-3-6 14

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